Re: analog generate-conditional

Geoffrey,

I have just worked through the section on paramsets and see what you mean. 
It seems that a generate-conditional can be rewritten for some situations 
using paramsets. I'll try to work out a couple of examples.

Thanks for the pointer.

Regards,
Marq


Marq Kole
Competence Leader Analog Simulation, Philips ED&T










"Geoffrey.Coram" <Geoffrey.Coram@analog.com> 
Sent by:
geoffrey.coram@analog.com
05-04-2006 23:07

To
Marq Kole/EHV/RESEARCH/PHILIPS@PHILIPS
cc
verilog-ams <verilog-ams@eda.org>
Subject
Re: analog generate-conditional
Classification







Marq -
I understand the interest in this.

In principle, the simulator can detect the "switch branch"
   if (rth > 0) begin
      I(tnode) <+ -pdiss;
      I(tnode) <+ V(tnode)/rth + cth*ddt(V(tnode));
   end else begin
      V(tnode) <+ 0;
   end
and properly "collapse" the node.

However, the compiler will have set up derivatives for the
tnode, and it is not easy to bypass them.

I wonder, though, if the generate is the right solution.
In your test case, your module "mex504" would need to declare
*all* of parameters of the underlying mextram504sh model
and pass them through (further, they need to have the 
defaults set in your module, because these values will
override the values in the underlying module).

It seems to me that you should be able to use paramsets
to set this up, using the selection rules such that only
one paramset has rth as a parameter (if rth is not
overridden, then "the paramset with the fewest number of
un-overridden parameters shall be selected" means that
the non-self-heating one would be picked.

The paramsets would specify the values for the process,
perhaps having (emitter) L and W as the "instance"
parameters.

-Geoffrey