Re: FLOW disciplines and KCL

From: Marq Kole <marq.kole_at_.....>
Date: Fri Jun 02 2006 - 07:07:43 PDT
Jonathan,

Your reply required some thinking before I could answer; I'll also copy 
the reflector as I think this is relevant to our discussions.

Regards,
Marq


Marq Kole
Competence Leader Analog Simulation, Philips ED&T


Jonathan David <jb_david@yahoo.com> wrote on 31-05-2006 18:41:25:

> Hi Marq, 
> 
> thanks for the reply. It looks like you missed part of
> my point.
> 
> Let me ask a question;  For a potential nature, do you
> expect KVL to be obeyed? I do, and I think you do
> also.. 
> V(B) = V(A) + V(B,A)
> V(A,gnd) + V(B,A) + V(gnd,B) = 0;

This is not necessarily the KVL: in mathematics this is also known as 
associativity. If you consider 0 to be the mathematical ground i..e 
reference, then with V(B) = 2 and V(A) = 3 you say:

2 = 3 + (2 - 3)
(3 - 0) + (2 - 3) + (0 - 2) = 0
 
> therefor when I flip to the FLOW side, I expect KCL to
> be obeyed. 
> KCL: Sum(I)@node = 0;
> 
> In fact if it isn't, it wouldn't be possible to
> connect the flow type to the flow connection of the
> compatible conservative discipline. 
> 
> but your example doesn't show a violation. 
> Without the context (how the block is connected) we
> can't talk about KCL. 
> Your example has no context.. its not connected up
> with any thing else, and without the connection nodes,
> we have no nodes at which to sum the currents to 0.

Yet the block itself is also a node, so the sum of currents flowing into a 
block should equal the sum of currents flowing out of a block. In a 
conservative system this would be solved by having the missing current 
supplied by the ground. That is OK as the potential of the ground stays 0: 
the energy conservation requirement of the consevative system makes sure 
that each node adheres to the KCL and each loop of branches to the KVL.

However, in a signal flow environment the ground of a flow discipline 
needs to be 0; you essentially give every flow a value relative to the 
reference.

The result is that Tellegen's Theorem (which says that the total energy in 
a conservative system is equal to 0) does not hold for signal flow 
disciplines.
 
> As I read it, 
> that model defines a second current in terms of a
> first. I(in,out) is not being defined as a branch
> relationship rather 
> I(out,0) is being defined in terms of I(in,0).
> two separate branchs, neither having to do with each
> other.. so I don't see any violation of KCL..
> Generally in the model I define the branch not the
> nodes.. 

The KCL also applies to every possible collection of nodes in a 
conservative lumped element system.
 
> What I mean by flow signal_flow disciplines obeying
> the KCL, is that the sum of the current connections at
> a node will be 0.  so you can have N current
> discipline sources into a node, as long as there are
> N+1 connections (only 1 load) 
> without the electrical side to serve as a resolution
> function, I don't see how you could allow N+2 .. 
> Unless we arbitrarily say that every undertermined
> branch gets an equal flow.. 

Now I see what you're getting at: if I have three instances all connected 
to the same node,
then if they are of a potential signal flow discipline, the value is 
determined by just one of the three connections; if they are of a flow 
signal flow discipline, the value for one of the three should be 
determined from the other two.

As there is no energy conservation in a signal flow system, there is no 
possibillity to say how currents will be distributed if only one of the 
three instances drives a current. It is an underdetermined system (1 
known, 3 equations). So here is a duality: in the potential signal flow 
system there may be at most 1 source driving a node, in the flow signal 
flow system there may be at most one sink collecting from a node.

Under these conditions I can agree that a flow signal-flow discipline 
adheres to the KCL. Should we then also mandate that directions be 
provided on all signal flow discipline ports so a check on the above 
restrictions can be performed?

The KCL does not apply to instances that contain sources in a signal flow 
system: in a conservative system the KCL applies also in that case.

> Most simulators I know don't allow this on the
> potential side.. 
> if you have a loop of nodes, 0 ground, A, B, C, D, E,
> A
> and you define V(A,0), V(A,E) V(B,C) and V(C,D)
> (so V(A,B) and V(D,E) are undefined 
> KVL requires that the sum of voltages around the loop
> be 0, but there are two unknowns.. and one equation.
> The simulator I use most will complain about "no path
> to ground and install a gmin to ground at B,C, of D.
> 
> example.. If I define 
> voltage A, B
> V(A) <+ 3.0;
> V(B,A) <+ 1.0;
> 
> I expect V(B) {V(B,simulator ground)} = 4.0
> 
> I expect them to obey KVL, even though they are not
> conservative, but signal flow (potential) discipline.
> I don't expect KCL to be obeyed because the current's
> "don't exist"..
> 
> I expect the same thing (KCL to work, KVL undefined)
> on the signal_flow (Flow) side. 
> 
> Here is a single model example that defines multiple
> branches between two nodes.. (giving us the connection
> network we need for KCL)
> 
> 
> current A, B
> branch one (A,B)
> branch two (A,B)
> branch three (A,B)
> I(one) <+ 1.0;
> I(two) <+ 1.0;
> Isum = I(three);
> will result in Isum = -2.0
> 
> defining a module with only 2 ports doesn't
> automatically make a branch between those two nodes if
> there are treated separately in the model.. 
> (single node definitions always assume ground as the
> reference node for that branch )
> 
> In a "potential" situation, only 1 potential around a
> loop can be left undefined, determined by KVL. 
> in a "flow" situation, only 1 flow into a node can be
> left undefined, determined by KCL. 
> 
> In fact, I think this is the behavior/constraint that
> allows the signal_flow disciplines to connect to the
> compatible conservative disciplines. 
> 
> I believe this is an accurate representation of what
> the signal flow guys are expecting for the behavior of
> "FLOW" type signal_flow behavior.
> 
> does it make sense now?
> Jonathan

Yes, thanks for taking the time to help me understand.

Cheers,
Marq

> 
> --- Marq Kole <marq.kole@philips.com> wrote:
> 
> > Jonathan,
> > 
> > In response to your email to Peter: I would not even
> > expect a signal flow 
> > flow nature to follow the KCL. As an example: the
> > following signal flow 
> > block does not obey the KCL:
> > 
> > `include "disciplines.vams"
> > 
> > discipline current;
> >   flow Current;
> > enddiscipline;
> > 
> > module current_mult (in, out);
> > inout in, out;
> > current in, out;
> > parameter real mult = 2;
> > 
> > analog
> >   I(out) <+ mult * I(in);
> > 
> > endmodule
> > 
> > In a conservative system the potential and the flow
> > are linked, where one 
> > obeys the KCL, and the other the KVL. Because
> > conservation is absent in a 
> > signal flow system, the actual distinction between a
> > potential and a flow 
> > is also absent. The only relevant thing in such a
> > discipline is the value. 
> > That is why limiting the nature in signal flow
> > disciplines to potential 
> > only is a mistake. Both flow and potential would fit
> > equally well.
> > 
> > To make a connection between a conservative system
> > and the above current 
> > multiplier I assume a separate (connect)module would
> > be needed that 
> > assures conservation on the conservative side.
> > 
> > Marq
> > 
> > 
> > Marq Kole
> > Competence Leader Analog Simulation, Philips ED&T
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > Jonathan David <jb_david@yahoo.com> 
> > Sent by:
> > owner-verilog-ams@server.eda.org
> > 31-05-2006 01:36
> > 
> > To
> > Peter Liebmann <peterl@xpedion.com>
> > Sri Chandra <srikanth.chandrasekaran@freescale.com>
> > cc
> > Verilog-AMS LRM Committee
> > <verilog-ams@server.eda.org>
> > Subject
> > Re: Agenda for committee call - 30 May 2006
> > Classification
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > Resending my response to peter back to the list:
> > 
> > I would expect both of those expressions to fail a
> > syntax check, due to using the output value on both
> > the left hand and right hand side of the equation.. 
> > To do that I think you need to use the "IMPLICIT"
> > form..
> > V(n1) : 2*V(n1)+6 = 0;
> > which I would read:
> > (the Voltage on n1 is defined such that 2*V(n1)+6 =
> > 0;
> > 
> > You could model a resistor divider from n1 to n2 in
> > two ways: 
> > conservative: 
> > V(n1,n2) <+ R1* I(n1,n2);
> > V(n2) <+ R2*I(n2); // gnd is implicit reference
> > // handles non-zero current flow out of n2 into
> > other
> > circuitry
> > 
> > signal flow potential
> > V(n2) <+ V(n1)*R2/(R1+R2);
> > //Assumes I(n2) ~0
> > // but the voltage is the same even if its not.. 
> > 
> > But While I would expect a signal_flow (flow) nature
> > to follow KCL: without the accompanying potential we
> > can hardly call it conservative. 
> > 
> > its either CONSERVATIVE (Potential & FLOW)
> > or its SIGNAL FLOW (Potential or Flow).. never both.
> > 
> > 
> > an example:
> > ---
> > so if the SOURCE model has 
> > 
> > module top;
> > electrical extres;
> > voltage vbandgap;
> > current iref;
> > source REF (.n1(iref), .vbg(vbandgap) .res(extres));
> > resistor #(.r(12K)) Rext (extres,gnd!);
> > load DUT (.ibias(iref));
> > endmodule
> > 
> > module source (n1, vbg, res);
> > output current n1;
> > output voltage vbg;
> > output electrical res;
> > analog begin
> >   V(vbg) <+ 1.20;
> >   V(res) <+ 1.20; // 1.2v/12K = 0.1m = 100uA 
> >    // out => -100mA
> >   I(n1) <+ I(res)/2.0; // -50ua 
> > end
> > 
> > module load (ibias);
> > input current ibias;
> > real Ibias;
> > analog begin
> >  @timer(0,10m) begin
> >   $strobe("INFO: %M: Ibias = %g at %g\n", I(ibias),
> > $abstime);
> >  end
> > end
> > endmodule
> > 
> > I Should get 
> > INFO: top.DUT: Ibias = 5.00e-5 at 0.000
> > INFO: top.DUT: Ibias = 5.00e-5 at 1.00e-5
> > ...
> > in the log file.
> > 
> > Showing that the current OUT of the Source = the
> > current INTO the load (and "into" is the positive
> > current direction, even for output pins..  )
> > 
> > In my view, a single module in Verilog is useless..
> > its the interconnection of multiple modules that is
> > useful.. 
> > 
> > 
> > Jonathan
> > 
> > --- Peter Liebmann <peterl@xpedion.com> wrote:
> > 
> > > I have a question about signal flow with a flow
> > > nature.  Is it conservative?
> > > The reason I ask if one has a signal flow
> > potential
> > > nature , the solution
> > > to a simple equation with only one source at n1,
> > > 
> > >     V(n1) <+ 2*V(n1) +6;
> > > 
> > > is obviously -6.
> > > 
> > > However, if n1 is a signal flow flow nature and is
> > > conservative,
> > > 
> > >     I(n1) <+ 2*I(n1) +6;
> > > 
> > > has no solution since I(n1) must sum to 0 and
> > there
> > > is only one source 
> > > at n1.
> > > 
> > > Is this what we want?
> > > 
> > > Peter Liebmann
> > > 
> > > 
> > > Sri Chandra wrote:
> > > > 
> > > > Time & Date: 30 May 2006, 3pm Pacific
> > > > Dialin: 1-877-346-8823 (US - toll free)
> > > >           1-203-320-0407 (Intl)
> > > > Pin: 602538
> > > > 
> > > > 
> > > > * Review of chapter 2 - lexical tokens with
> > 
> === message truncated ===
> 
Received on Fri Jun 2 07:08:16 2006

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