RE: Regarding support of wreal

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Tue Aug 08 2006 - 01:35:17 PDT
Sure. I've done similar things. But did it assign the signals voltage
and current levels?

> 5 years ago I ran across and (already old) paper on a model for a PLL
> circuit where all the integration for the "analog" nodes was written
> behaviorally in Verilog..

Shalom
Received on Tue Aug 8 01:35:58 2006

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