Hello Marq Yes I've raised them in the past when merging the analog with the 1364-2005 syntax. Here is some more issues that need to be considered as well. Currently analog_construct, aliasparam_declaration, branch_declaration and analog_function_declaration are not allowed within the generate_region sytnax. If analog_construct is allowed within the generate_region, then I suggest these other items should be allowed. By supporting generate regions and allowing analog block(s) within these regions, it raises the question about the usefulness of the analog_loop_generate_statement within the analog block. Should the analog_loop_generate_statement be phased out and use the loop_generate_construct instead? Consider the simple example below. Currently description module example ; electrical [10:0] net; genvar i; analog begin $display("initial behavior."); for (i=0; i<10; i=i+1) begin V(net[i]) <+ i; end $display("more behavior."); end endmodule Alternative description: module example ; electrical [10:0] net; generate analog $display("initial behavior."); genvar i; for (i=0; i<10; i=i+1) begin analog V(net[i]) <+ i; end analog $display("more behavior."); endgenerate endmodule Regards Graham Marq Kole wrote: > > All, > > I am currently working on section 7, and up till now I've encountered > two items for which now Mantis items are available, but which I recall > have had some serious discussions in the past: > 1. Support for looping and conditional generator statements (IEEE > 1364-2005, sec 12.4); > 2. Support for multiple analog blocks within one module (related to > item 1); > (I'm not sure I have the formal names of these things right as I don't > have the standards documents at hand) > > For the first item: if only module instantiations are part of the > generator constructs, then this could be solved without much issues > during elaboration; however, if we also want to be able to use these > generator constructs on analog blocks, we have to make a decision on > item 2. I believe that in digital you can use the generator statements > also for always and initial blocks, as well as for tasks, so the > logical extension into the AMS domain would be to support analog > blocks for this as well. > > Is there any particular reason why multiple analog blocks would be > hard to support? Wouldn't they just appear as (inline) subcircuits to > the simulator kernel? > > Cheers, > Marq > > > Marq Kole > Competence Leader Robust Design > > Research > NXP Semiconductors -- ========================================================== Graham Helwig AMS Verification Australian Semiconductor Technology Company (ASTC) Pty Ltd Location: 76 Waymouth St, Adelaide, SA, 5000, Australia Phone +61-8-82312782 Moblie: +61-4-03395909 Email: graham.helwig@astc-design.com Web: www.astc-design.com ==========================================================Received on Mon Oct 16 17:35:29 2006
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