David, I do not want to be picky, but I believe that whereever control strings are used in the current Verilog-AMS LRM they are generally lower case. For example: in the $analysis function, in the $random and $rdist_* functions, the $simparam function, the $limit function, etc. Only in the extrapolation string of the $table_model function uppercase characters are used, but there it is not a word but the character itself that bears the meaning. Therefore, I would suggest using "lin" and "log", just to keep in style with similar uses in the LRM. Marq Kole Competence Leader Robust Design Research NXP Semiconductors Dave Miller <David.L.Miller@freescale.com> Sent by: owner-verilog-ams@server.eda.org 18-10-2006 16:51 To "Geoffrey.Coram" <Geoffrey.Coram@analog.com> cc Verilog-AMS LRM Committee <verilog-ams@server.eda.org> Subject Re: CORRECTED: Verilog-AMS Committee Meeting Minutes - Oct 12 2006 Classification Geoffrey.Coram wrote: > Dave Miller wrote: > >> The argument will be case insensitive, so LIN == lin. >> > > Is there any place in the current LRM where it is > case insensitive? My sense is that the LRM is > always case-sensitive. > > -Geoffrey > > G'day Geoffrey, yes, I shouldn't have said this. The control string will either be "LOG" or "LIN" with "LIN" being the default. Cheers... Dave -- ===================================== -- David Miller -- Design Technology (Austin) -- Freescale Semiconductor -- Ph : 512 996-7377 Fax: x7755 =====================================Received on Mon Oct 23 00:56:54 2006
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