RE: compiler directive with formal arguments

Hello everyone,

I need to add a few of my thoughts to this subject on text macros.

For one, the example below uses the double quotes around the macro
text, which is incorrect considering what is shown in "will print".
As I was studying section 11.3 in LRM v2.2 (p. 239), I was surprised
to find out that macro text and string are two different things.
Strings are surrounded by double quotes, but the macro text is NOT!
I thought this was an inconsistency, but some Verilog-AMS gurus from
a vendor convinced me that this is the way it is (and should be).

So the example below should have said:

  `define H(x) "Hello, x" 
  $display(`H(world));
will print
  "Hello, x"

including the double quotes!

This raises another question in the LRM regarding arguments.  The LRM
says the following in this section:

"The macro text can be any arbitrary text specified on the same line as the text macro
name, but shall not begin with __VAMS_ to avoid conflicts with predefined macros in
Section 11.7."

The "any arbitrary text" means that the character "(" at the beginning of
the macro text  can be part of the text.  On the other hand, if argument(s)
are used, they will be enclosed by parentheses.  How is the compiler going 
to decide that an opening "(" character is an argument, or part of the macro
text?  You may say that if there is no space between the text_macro_identifier
and the first "(" character then it is an argument, but if there is a space
then it is part of the macro text.  However, this is not spelled out in the
LRM.  In addition, what am I supposed to do if I want to start my macro text
with a space or tab character?  Theoretically that should also be allowed,
since "any arbitrary text" is allowed in the macro text, right?

Another question I have on this subject is what the argument type can be.
The LRM example on p. 241 uses a literal for the argument:

//define an adc with variable delay
`define var_adc(dly) adc #(dly)
// Given the above macro the following uses
`var_adc(2) g121 (q21, n10, n11);
`var_adc(5) g122 (q22, n10, n11);
// shall result in:
adc #(2) g121 (q21, n10, n11);
adc #(5) g122 (q22, n10, n11);

Is it possible to use a variable or parameter instead, like this:

parameter integer MyNumber = 2;
`define var_adc(dly) adc #(dly)
`var_adc(MyNumber) g121 (q21, n10, n11);
// and expect this result?
adc #(2) g121 (q21, n10, n11);

Take this further one step, can we use string parameters or variables
and expect the compiler to expand it as if it was macro text?  The example
below is interesting from this perspective also:

  $display(`H(world));

Note that the argument world is not enclosed by double quotes.  Why?  What
is the type of this argument?  Is it a string?  If not, do we have a magic
type perhaps called "text" which doesn't get enclosed by double quotes?

But what if the argument is a string variable or parameter?  Is that going
to get expanded in the macro text and become part of the expanded macro text?
For example, can I write:

parameter string MacroArg = "world";
`define H(x) Hello, x
$display(`H(MacroArg));

and expect it to print:
  Hello, world

Or is it going to print:
  Hello, "world"

with the double quotes?  Or will (should) the compiler even take this?
 
I don't see any answers to these questions in the Verilog-AMS v2.2LRM and
I think it would be useful to make this area a little cleaner...

Thanks,

Arpad
==========================================================================

-----Original Message-----
From: owner-verilog-ams@server.eda.org [mailto:owner-verilog-ams@server.eda.org] On Behalf Of Geoffrey.Coram
Sent: Friday, November 03, 2006 6:37 AM
To: Bresticker, Shalom
Cc: Marq Kole; verilog-ams
Subject: Re: compiler directive with formal arguments

Ah!  I didn't actually look at the proposal for 1119,
because the description and additional information
did not mention argument substitution.

But the proposal (which was accepted at the Oct 9, 2006
SV-BC CC) clearly says:


Macro substitution and argument substitution shall not occur within strings. For example,

and gives an example:
  `define H(x) "Hello, x" 
  $display(`H(world));
will print
  Hello, x


-Geoffrey