[Fwd: Verilog-AMS Committee Meeting Reminder - 25 Jan 2007]

I guess we can have the same agenda as last week for call on 1st Feb.

regards,
Sri

-------- Original Message --------
Subject: Verilog-AMS Committee Meeting Reminder - 25 Jan 2007
Date: Wed, 24 Jan 2007 18:02:56 +0530
From: Sri Chandra <sri.chandra@freescale.com>
Organization: Freescale Semiconductor Inc.
To: Verilog-AMS LRM Committee <verilog-ams@eda.org>

Hi all,

Date & Time: 25 Jan 2007, 9-10pm Pacific

Call-In Details:
  USA Toll Free Number: 877-346-8823
  USA Toll Number: +1-203-320-0407 (for intl)
  Participant Passcode: 602538

The call times are:

09:00 PM Pacific   (Thursday)
11:00 PM Central   (Thursday)
Midnight Eastern
06:00 AM Eindhoven (Friday)
10:30 AM India     (Friday)
03:30 AM Adelaide  (Friday)

Agenda:
   * Multiple analog blocks proposal from Marq Kole
   * Upwards hierarchical references (section 8.8.5) raised by Kevin
   * Continue review on Chapter 10 documentation

Regards,
Sri
-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
Ph: +91-120-439 7021 F: x5199

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-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
Ph: +91-120-439 7021 F: x5199

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