All, To help with the discussion, here is an overview of who's going to enter DST when. The data was retrieved from http://www.timeanddate.com/time/dst2007a.html. United States Sunday, March 11, 2007 at 2 AM, moving 1 hour forward to 3 AM Eindhoven Sunday, March 25, 2007 at 2 AM, moving 1 hour forward to 3 AM Adelaide Sunday, March 25, 2007 at 3 AM, moving 1 hour back to 2 AM India does not have DST Unfortunately, I won't be able to join the discussion as I'm currently ill at home, and rising at 6 AM is not beneficial to my speedy recovery. If possible, I would like to have a time no earlier than 6 AM in the morning, but I'm OK with any starting time of midnight and earlier. Cheers, Marq Marq Kole Competence Leader Robust Design Research NXP Semiconductors Sri Chandra <sri.chandra@freescale.com> Sent by: owner-verilog-ams@server.eda.org 01-03-2007 04:04 To Verilog-AMS LRM Committee <verilog-ams@server.eda.org> cc Subject Verilog-AMS Committee Meeting - 01 March 2007 Classification Hi all, Date & Time: 01 March 2007, 9-10pm Pacific Call-In Details: USA Toll Free Number: 877-346-8823 USA Toll Number: +1-203-320-0407 (for intl) Participant Passcode: 602538 The call times are: 09:00 PM Pacific (Thursday) 11:00 PM Central (Thursday) Midnight Eastern 06:00 AM Eindhoven (Friday) 10:30 AM India (Friday) 03:30 AM Adelaide (Friday) Agenda: - Discussion of new timings from 15th March - P1800 dot standard and SV-XC cross-language committee - Continuation on Chapter 10 review Regards, Sri -- Srikanth Chandrasekaran Design Technology (Tools Development) Freescale Semiconductor Inc. Ph: +91-120-439 7021 F: x5199 -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Thu Mar 1 10:44:55 2007
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