Actually I didn't mean to suggest to CHANGE the current <+ operator to be an assignment operator. I would keep it as is for backward compatibility, and use something else (something involving "=") to do assignments instead. VHDL-AMS uses "==" for simultaneous equations, which may not be a bad choice, provided it does something very similar. Arpad ========================================================== ________________________________ From: owner-verilog-ams@server.eda.org [mailto:owner-verilog-ams@server.eda.org] On Behalf Of Kevin Cameron Sent: Friday, April 20, 2007 11:30 AM To: Geoffrey.Coram Cc: verilog-ams Subject: Re: disallow distributed switch branches snip... It's kind of late for that, I think (as well as for Arpad's suggestion to make <+ an assignment rather than contribution operator). It would be a huge backwards-compatibility fiasco. snip... -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Fri Apr 20 11:40:44 2007
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