Verilog-AMS Committee Meeting for 10th May

Hi,

It looks like the message that I am sending to the reflector is not 
going through. I sent a Verilog-AMS committee meeting agenda last night 
and also this morning again but i dont think neither of them went 
through. Is anybody else facing this problem.

I have copied few of the regular attendees.

Because of this confusion it looks like Martin hasn't joined in and 
activated the call. I apologize for this confusion and for those who 
have been waiting in the call.

We will have the same agenda next week - review of the idt() proposal 
followed by Patrick's proposal on table_model task.

cheers,
Sri
-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
Ph: +91-120-439 7021 F: x5199

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