Mantis 1206 is such an enhancement request for SystemVerilog, but no one is currently working on it. Shalom > -----Original Message----- > From: owner-verilog-ams@server.eda.org > [mailto:owner-verilog-ams@server.eda.org] On Behalf Of Ken Kundert > Sent: Wednesday, August 29, 2007 6:44 AM > To: verilog-AMS LRM Committee > Subject: suggestion > > All, > It would be very handy to have access to the `timescale > value from within a model so that we can write delays in > terms of time rather than ticks. > > Just to throw something out, say $tick returns the length of > a tick in seconds. Then one can use it in the digital portion > of the model as in the following example (a d flip-flop that > implements 1n of delay regardless of how `timescale was specified) ... > > > parameter real td = 1ns; > ... > > always @(posedge clk) begin > q = #(td/$tick) d; > end > > -Ken > > -- > This message has been scanned for viruses and dangerous > content by MailScanner, and is believed to be clean. > > -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Tue Aug 28 23:20:03 2007
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