Hi all, Since we didnt have the meeting last week (only Dave & Geoffrey dialed in and it was canceled) we will have the same agenda this week. Regards, Sri -------- Original Message -------- Subject: Verilog-AMS committee meeting - 23rd Aug 2007 Date: Wed, 22 Aug 2007 16:28:38 +0530 From: Sri Chandra <sri.chandra@freescale.com> Organization: Freescale Semiconductor Inc. To: Verilog-AMS LRM Committee <verilog-ams@eda.org> Hi all, Date & Time: 23rd Aug 2007 Call-In Details: USA Toll Free: 877-346-8823 USA Toll: +1-203-320-0407 Passcode: 602538 Call times: 06:30am US Pacific 08:30am US Central 09:30am US Eastern 15:30pm Eindhoven 19:00pm Noida 23:00pm Adelaide Agenda: * Review of updates to chapter 10: - changes for $simprobe() and noise_table() * upcoming reviews - Review of chapter 9 next week (scheduling semantics) - Review of Annex C (verilog-a subset) Regards, Sri -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Wed Aug 29 04:17:13 2007
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