Re: Verilog-AMS Committee Meeting - 27th Sept 2007

From: Sri Chandra <sri.chandra_at_.....>
Date: Wed Sep 26 2007 - 08:09:48 PDT
Okay we will discuss this also tomorrow. Probably after review annex E
we can discuss this before moving to Chapter 9. I remember you alluding
to this in one of your earlier emails and sorry that i missed it.

cheers,
Sri

Geoffrey.Coram wrote:
> Sri -
> I'd also like to talk about whether chapter 5 should be eliminated,
> with the remaining content merged into chapter 6.  There's really
> almost nothing left, after we move the contribution statements
> (which are presently duplicated).
> 
> -Geoffrey
> 
> 
> Sri Chandra wrote:
>> Date & Time: 27 Sept 2007
>>
>> Call-In Details:
>>    USA Toll Free: 877-346-8823
>>    USA Toll: +1-203-320-0407
>>    Passcode: 602538
>>
>> Call times:
>> 06:30am US Pacific
>> 08:30am US Central
>> 09:30am US Eastern
>> 15:30pm Eindhoven
>> 19:00pm Noida
>> 23:00pm Adelaide
>>
>>
>> Agenda:
>>   * Review of Annex E updates done by Marq
>>   * Chapter 9 updates done by Junwei
>>   (Both documents have been loaded into the reflector)
>>
>> Upcoming:
>>   * Annex C review
>>
>> Regards,
>> Sri
> 

-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
T:+91-120-439 5000 p:x3824 f: x5199


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Received on Wed Sep 26 08:17:36 2007

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