RE: analog final block

From: Marq Kole <marq.kole_at_.....>
Date: Thu Nov 29 2007 - 05:09:27 PST
Hi Shalom,

Yes, I'm aware of the fact and one of the reasons to propose it is that
some users who know digital Verilog or SV might find it strange that there
is an analog initial block (which is different from the digital initial
block) without an analog final block.

Cheers,
Marq



                                                                       
                                                                       
                                                                       
                                                                        To
                                       "Marq Kole" <marq.kole@nxp.com> 
                                       "verilog-ams"                   
     "Bresticker, Shalom"              <verilog-ams@server.eda-stds.org>
     <shalom.bresticker@i                                               cc
     ntel.com>                                                         
                                                                   Subject
     29-11-2007 13:54                  RE: analog final block          
                                                            Classification
                                                                       
                                                                       
                                                                       
                                                                       
                                                                       
                                                                       
                                                                       




Are you aware that SV has a final block?

Shalom

 From: owner-verilog-ams@server.eda.org
 [mailto:owner-verilog-ams@server.eda.org] On Behalf Of Marq Kole
 Sent: Thursday, November 29, 2007 2:47 PM
 To: verilog-ams
 Subject: analog final block



 All,

 With respect to earlier discussions of an analog initial block we had
 previously dismissed an analog final block as being less relevant. Maybe
 we should reconsider this as where an analog initial block may open a file
 to read data from that is used in initialization. If data from that file
 is also needed later on in the simulation then an analog final block may
 be usefull for closing that file. An final_step event would in that case
 not always be able to handle the closing of files, for instance in the
 case of a DC sweep. The analog final block would then be guaranteed to be
 run after all of the regular analog blocks have been processed, and prior
 to any sebsequent analog initial blocks are processed in case of a (DC)
 parametric sweep.

 Alternatively, the analog final block can act as a conceptually simpler
 description of an analog final_step event and obviously with most of the
 same limitations as a global event - no contribution statements, no analog
 operators, no event control statements, but support for access functions.

 Does this make any sense?

 Cheers,
 Marq


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Received on Thu Nov 29 05:13:26 2007

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