Minutes of the Draft2 review - 10th Jan 2008

Date: 10th Jan 2008 (9:00pm Pacific)

Attendees:
* Patrick O'Halloran - Tiburon
* Martin O'leary, Cadence
* Dave Miller, Freescale
* Marek Mierzwinski, Tiburon
* Sri Chandra, Freescale
* Stu Sutherland, Sutherland HDL

The following chapters were reviewed:
   - Title page, TOC etc
   - Chapter 1, Verilog-AMS introduction
   - Chapter 2, Lexical Conventions
   - Chapter 3, Data types
   - Chapter 4, Expressions

Review notes: (page number references are to the actual document page 
numbers and not the pdf page numbers)

* General:
   - Stu will check whether its possible to dump line numbers in the 
document as part of printing into pdf.
   - The minutes document only the changes that are needed on draft2.

Question to Stu? How should i record these changes in mantis database? 
(one mantis ticket on a per chapter basis)?


* Title page, TOC etc
   - (pg 4) List of authors need to be cleaned up in the acknowledgment 
section. It was unclear who the list should include - all contributors 
until now vs current active participants for the LRM. For IEEE they 
specify the current active participants, plus any of the key 
contributors from the previous LRM. Sri will send out a list of active 
participants to the reflector and committee members can suggest who else 
needs to be included in the acknoledgment.

* Chapter 1, Verilog-AMS introduction
   - (pg 19) Example for bullet point #3 in clause 1.4 needs to be 
modified. It should refer to AMS extension to the standard. Use BNF from 
section A.1.8; connectrules_declaration ::=

* Chapter 2, Lexical Conventions
   - (pg 30) There is a footnote 4) specified as part of clause 2.8.3, 
but the footnote reference is missing in the BNF insert specified.
   - (pg 31) In clause 2.9.1, the correct cross-references should be 
clause 3.4.3 (which talks about units and descriptions). This is true 
for both the bullet points specified in this section.

* Chapter 3, Data types
   - (pg 38) Verilog-AMS does not support typedef and is also not part 
of Annex B, keywords section. This must have been a cut-paste from 
SystemVerilog. The suggestion is to remove "typedef" from the example. 
Rest of the example is still valid.
   - (pg 45) The correct cross-reference in clause 3.6.1, should be to 
clause 3.6.1.2
   - (pg 50) The clause heading for 3.6.2.4 should be renamed to 
"Discipline of nets" to reflect the changes in the body.
   - (pg 56) Reference to "logic" in clause 3.10 should be changed to 
"ddiscrete" as per the proposal to change "logic" keyword due to clash 
with SystemVerilog. This proposal for some reason got dropped and didn't 
make it to DraftA or Draft2. Martin will send out this proposal and 
changes to Annex D which reflects this change. The change from "logic" 
to "ddiscrete" is a global change.
   - (pg 56) Remove the reference to "bit" in clause 3.11 as this is not 
an AMS keyword.

* Chapter 4, Expressions
   - (pg 76) In clause 4.5.6 the BNF inset should refer to 
analog_filter_function_call instead of ddx_call and refer A.8.2 from the 
BNF.
   - (pg 82) The ";" should be removed from the general form description 
for the last_crossing function in clause 4.5.10


Next review: from Chapter 5, scheduled for Jan 17th same time.

cheers,
Sri
-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
T:+91-120-439 5000 p:x3824 f: x5199

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