Minutes of Verilog-AMS meeting - 7 Feb 2008

Minutes of Verilog-AMS meeting - 7 Feb 2008

* Dave Cronauer, Synopsys
* Martin O'Leary, Cadence
* Marek Mierzwinski, Tiburon
* Graham Helwig, ASTC
* Stu Sutherland, Sutherland-HDL
* Patrick O'Halloran, Tiburon
* Sri Chandra, Freescale

Chapters Reviewed:
   - Chapter 10, Compiler directives
   - Chapter 11, 12 VPI
   - Annex A, BNF
   - Annex B, Keywords
   - Annex C, Verilog-A language subset
   - Annex D, Standard definitions
   - Annex E, Spice compatibility
   - Annex F, Discipline resolution methods
   - Annex G, Open Issues
   - Annex H, Change History
   - Annex I, Glossary


Chapter 9, System tasks and functions
   - Geoffrey raised a missing item on last week's review with regards 
to constant arguments used within distribution functions which conflicts 
with SV.
   - Was discussed during the committee meeting. A separate email has 
been posted to the reflector regarding this issue

Chapter 10, Compiler directives
   - (pg 251, clause 10.1) end_keyowrds spelt incorrectly
   - (pg 253, clause 10.4) The `undef macros have no effect on the 
_VAMS_ macros (clarification as per editors query)
   - (pg 257, clause 10.5) electrical shouldnt be highlighted, 
$temperature should be highlighted in the second example
   - (Clause 10) Should we add `begin_keywords_ams since we have 
additional directives specific for AMS. It was agreed that it should be 
added and Martin will send out a proposal to that effect (AI: Martin)

Chapter 11, Using VPI routines
Chapter 12, VPI routine definitions
   - no changes, these chapters were not modified for this revision

Annex A, Formal syntax definition
   - (pg 339) Probably add note on coloring scheme on beginning of Annex 
A. The coloring scheme is specified in Clause 1, but felt might be good 
to state again over here.
   - (pg 346, clause A.2.6) There is a typo - should be 
"inout_declaration" instead of "nout_declaration"

Annex C, Analog language subset
   - (pg 371, clause C) It was decided in the meeting that Annex C will 
be normative.
   - (pg 371, clause C.1.2) There is no specific order to the bullet 
points, so it need not be a numbered list.
   - (pg 372, clause C.2) Change cross-reference Annex C.15 to just C.15
   - (pg 372, cluase C.5) Merge clause C.5 and C.6
   - (pg 373, clause C.8) The reference to clause 7 is correct in the 
text. Need a white space after Clause 7.
   - (pg 373, Clause C.14, 15, 16, 17) Remove normative from the section 
headings
   - (pg 374) Editors note to be clarified after the call by Sri.
     -- Update: Stu to be honest I don't know what those 
cross-references are in that section. I am not sure whether those 
references are obselete. Infact i am not sure whether we should refer to 
keywords not used in Verilog-A. I suggest we remove "From Annex, ..." 
and just list the keywords specified there (this list of 10 keywords in 
just one single paragraph). I will also post this to the reflector.
   - (pg 374, clause C.18) Change the reference of Verilog-A to 
Verilog-AMS in section heading

Annex D, Standard definitions
   - (pg 375, clause D.1) Change from discrete to ddiscrete (this has 
already been identified in an earlier review and Stu was planning to 
make this change globally in the next draft)
   - (pg 379, clause D.2) white spaces missing after `define for 
mathematical constants
   - (pg 379, clause D.3) The "`" specified for `define is different to 
the ones used for other `defines (for example in D.2) and also the "`" 
used for DRIVER_DELAYED for as part "32'b" is the wrong tick.

Annex E, Spice compatibility
   - (pg 381) Annex E is normative
   -
Annex F, Discipline resolution methods
   - no changes

Annex G, Open issues
   - (pg 393) Annex G is informative
   - It was suggested that instead of listing the open issues in a table 
can a reference be made to the mantis database where the issues are 
traacked. The committee will go through these and keep this up to date.

Annex H, Change history
   - (pg 396) Annex H is informative
   - (pg 399) Table L-3 should refer to v2.2 instead of v2

Annex I, Gloassary
   - (pg 4040) Annex I is informative


Next meeting: We will take a break next week and shall meet on the 21st 
of February.

Regards,
Sri
-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
T:+91-120-439 5000 p:x3824 f: x5199

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