Re: Draft 4 version

Stu,

Thanks for getting back immediately. If there aren't any changes to 
draft4 then i guess I can put pressure on Accellera to make a press 
release (assuming we send it to the board immediately), otherwise we 
need to find a different way of publicizing it at DAC.


All,
So if its okay with everybody I guess we can have a review of that 
document tomorrow (May 9th), same time at the various timezones. Please 
let me know if there are any concerns otherwise for this week we will 
meet on Friday morning pacific time 7:00am. Please consider this as the 
agenda reminder. :) If for any reason, Stu is unable to send the doc, we 
will meet next week.

Regards,
Sri

Stuart Sutherland wrote:
> Sri,
> 
> I got side-tracked last week by some unexpected business and some family
> affairs.  I was not able to work on the editing for draft 4 last week, but
> started work on it this week.  I expect to have draft 4 completed by 5 PM
> Pacific time today (Thursday, May 8).
> 
> I would think Accellera could still squeeze in doing a press release -- DAC
> is still 30 days away, as of today.
> 
> I can be available for a conference call Thursday evening or anytime on
> Friday (Pacific time).
> 
> I will be at DAC.
> 
> Stu
> ~~~~~~~~~~~~~~~~~~~~~~~~~
> Stuart Sutherland
> stuart@sutherland-hdl.com
> +1-503-692-0898
> 
>> -----Original Message-----
>> From: owner-verilog-ams@eda.org [mailto:owner-verilog-ams@eda.org] On
>> Behalf Of Sri Chandra
>> Sent: Wednesday, May 07, 2008 11:42 PM
>> To: Stuart Sutherland; Verilog-AMS LRM Committee
>> Subject: Draft 4 version
>>
>>
>> Stu,
>>
>> Would you able to give an estimate when this would be ready? I guess
>> its
>> too late for having a call today, but just wondering whether we can
>> have
>> a review tomorrow (Friday) if the draft version comes out today.
>>
>>
>> All,
>> I am hoping that we are fairly close to the final version, possibly
>> just
>> one more revision. I guess we have missed the deadline for DAC press
>> release as it requires one month period for Accellera review and
>> approval but at least hoping that we could announce at DAC that the
>> LRM2.3 has been frozen and sent for board approval.
>>
>> On this note, is anybody from this committee going to be at DAC? Please
>> do send me a note on that.
>>
>> Regards,
>> Sri
>> --
>> Srikanth Chandrasekaran
>> Design Technology (Tools Development)
>> Freescale Semiconductor Inc.
>> T:+91-120-439 5000 p:x3824 f: x5199
>>
>> --
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> 
> 
> 

-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
T:+91-120-439 5000 p:x3824 f: x5199

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