Re: Draft4-prelim2 review tomorrow

From: Jonathan David <jb_david_at_.....>
Date: Thu May 15 2008 - 01:44:34 PDT
with regard to 3.4.1 - I just looked over 1364-2005 and there are no String type parameters in verilog.. 
only integer parameters and string VARIABLES.. 
string parameter is an extension lets make sure our implementation is compatible with system verilog.. 


 Jonathan David
j.david@ieee.org
jb_david@yahoo.com
http://ieee-jbdavid.blogspot.com
Mobile 408 390 2425


----- Original Message ----
From: David Miller <David.L.Miller@freescale.com>
To: Verilog-AMS LRM Committee <verilog-ams@eda.org>
Cc: stuart@sutherland-hdl.com
Sent: Wednesday, May 14, 2008 4:39:09 PM
Subject: Re: Draft4-prelim2 review tomorrow

Hello all, please find the updated draft on the website:

http://www.eda-stds.org/verilog-ams/htmlpages/public-docs/VAMS_v2.3-Draft4-preliminary-2.pdf

Cheers...
Dave

Sri Chandra wrote:
> 
> Hi all,
> 
> Stu sent a note saying that he will be sending out the prelim2 version 
> over the next few hours.
> 
> We will have the review of the document at 7:00am pacific time on the 
> 15th of May. I will send out the document link details once its uploaded 
> on the web page.
> 
> Marq - Stu was saying that he has not received the updated Annex H from 
> your end. Any update on that?
> 
> Please find call times and details:
> 
> Date: 15 May 2008
> 
> Call-In Details:
> USA Toll Free: 877-346-8823
> USA Toll: +1-203-320-0407
> Passcode: 602538
> 
> Call times:
> 07:00am US Pacific
> 09:00am US Central
> 10:00am US Eastern
> 16:00pm Eindhoven
> 19:30pm Noida
> 23:30pm Adelaide
> 
> Regards,
> Sri

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-- Freescale Semiconductor
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Received on Thu May 15 01:46:49 2008

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