Analog System Verilog Assertions: Problem Scope and Definition

From: Anand Himyanshu-R61978 <HIMYANSHU.ANAND_at_.....>
Date: Wed Oct 01 2008 - 08:39:59 PDT
When: Occurs every 2 weeks on Tuesday effective 10/7/2008 from 11:30 AM to 12:30 PM (GMT-06:00) Central Time (US & Canada).
Where: Dial In Access Code: 1848720

*~*~*~*~*~*~*~*~*~*

Time: 11:30 AM - 12:30 PM Central Standard Time (Austin Time) (GMT - 5:00)

Agenda:

1) Continuation of problem scope and definition of Analog System Verilog Assertions (ASVA)
2) Presentation by Mike Demler (Synopsys) on device level properties
3) Presentation of more properties/examples by Dejan Nickovic

- The current site for verilog-ams is http://eda.org/verilog-ams/ 
- Till a permanent home is found, documents released to the committee can be found at  http://www.eda-stds.org/verilog-ams/htmlpages/public-docs/AMS_Assertions/

Dial In Access Code: 1848720
USA: +1-800-867-1147

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