FYI... -- Himyanshu Anand EDA Strategy, Vendor Relation and Customer Collaboration, Design Technology Organization, Freescale Semiconductor 7700 W. Parmer Lane, Loc/MD: TX32/PL34 Austin, TX 78729 email : Himyanshu.Anand@freescale.com Ph : +1-512-996-5623 Fax : +1-512-996-7432 -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.
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> Srini (Synopsys) raised the question of using SV Tasks to check some of > the examples presented by Dejan. Dejan answered that assertions were > less ad hoc and that procedural AMS was not accurate enough to capture > all the properties. Srini wanted to know about the compactness of the > property. Dejan mentioned that assertions were more concise than writing > in 'C', also assertions are more expressive, they might not be that much > more concise than writing them in VAMS equivalent constructs. Just one clarification, I meant that the current state of STL/PSL assertions was less expressive for some properties than VAMS, and not vice versa (the example of time bounds depending on slew rates). Best, DejanReceived on Wed Oct 8 07:29:51 2008
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