Queries regarding study group for Verilog-AMS

From: Sri Chandra <sri.chandra_at_.....>
Date: Mon Dec 01 2008 - 03:39:05 PST
Dear Michael,

Sorry if this was already covered but can you clarify some of the 
process expected as part of this PAR work. DASC approved the formation 
of the study group and expect the PAR to be submitted in 6 months time 
frame which is before April.

I have the following questions:

1. What elected positions are required in the study group. Under 
Accellera we have only one position which is essentially the technical 
chairperson of the committee

2. Pretty much all the members participating in the AMS work will be 
part of the study group. I guess that should be fine.

3. What is the deliverable expected for PAR approval? We already have an 
approved and released version under Accellera, which is Verilog-AMS 
v2.3. We just want to do the next steps/stages of work under IEEE which 
is SystemVerilog intergration with AMS (SV-AMS). I am bit unclear what 
is expected as deliverable of this study group that needs to be 
submitted as part of PAR approval.

4. It is still unclear to me whether documents can be released under 
Accellera. We are creating this working group/PAR for SV/Verilog-AMS 
integration. However, its possible that we might be able to release the 
work in other subcommittee earlier (possibly under Accellera).

5. I understand that the decision on individual vs corporate standard 
needs to be done before we submit the PAR (which is probably in 4 months 
time from now). Is that correct? Currently we have two confirmed members 
for corporate standards (as voting members) and couple of other members 
have shown interest in individual standards.

Regards,
Sri


-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
T:+91-120-439 5000 p:x3824 f: x5199

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Received on Mon Dec 1 03:43:20 2008

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