Issue in vers. 2.3 and 2.3.1 of LRM

All,
     Somehow some unnecessary restrictions were placed on OOMRs in the 
LRM that should be removed. In LRM 2.3.1 these restrictions are given on 
page 144. One in particular is very unfortunate, as it interferes with 
the ability to create testbenches. The restriction is ...

It shall be an error to hierarchically reference port branches.

Prior to vers. 2.3 of the LRM one could build a testbench that reached 
into the design hierarchy and probed the voltage or current of any port. 
Now, one can only probe the voltage.

How do we go about fixing this?

-Ken

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