Re: Cadence wreal proposal donation result

Given that the proposal from Mentor Graphics is a superior solution for
the resolved real signal type, but depends on syntax that is SV rather
than Verilog-AMS (classes etc.), and also extends SV, I say (again) this
whole issue should be left for when SV and Verilog-AMS are merged.

If not: does the Mentor Graphics document need to be formally
donated/accepted before official consideration?

Kev.

On 04/06/2010 08:57 AM, Sri Chandra wrote:
> Hi all,
>
> The closing date for voting on this proposal from the Accellera active
> members was 19th March 2010.
>
> We got 7 yes votes for accepting the donation from Accellera
> members and 1 ambiguous vote, and with this the wreal donation from
> Cadence is considered accepted.
>
> Once again this is not a vote on its inclusion in the actual standard,
> this will be done as per the usual technical committee language
> development process to address any and all open issues/requirements
> that are not addressed in the proposal. As part of this donation,
> Cadence has also provided patent licensing (if any, pending or
> approved) used in the donation to Accellera, and Cadence will not
> enforce any patent claims for users of this donation. A letter of
> assurance has also been signed by Cadence that no further patenting
> will be done, and the implementers have the same patent protection.
>
> Regards,
> Sri
>
>

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