RE: Verilog-AMS meeting agenda - 12th May 2010

From: Bresticker, Shalom <shalom.bresticker@intel.com>
Date: Wed May 12 2010 - 06:53:03 PDT

Sorry, I had not noticed that a meeting was scheduled for today, but I had a conflict anyway.
Normally, I should be able to participate at this time.

Shalom

> -----Original Message-----
> From: owner-verilog-ams@eda.org
> [mailto:owner-verilog-ams@eda.org] On Behalf Of Sri Chandra
> Sent: Thursday, May 06, 2010 2:19 PM
> To: Verilog-AMS LRM Committee
> Subject: Verilog-AMS meeting agenda - 12th May 2010
>
>
> Hi all,
>
> After a brief lull for about 6 weeks, I thought it is time to
> get back
> on track with the huge amount of activities that we have got
> in front of us.
>
> Based on the feedback I received, it looks like choice #1 was most
> popular. We will have a meeting on a fortnightly basis
> (once-in-2-weeks).
>
> California: 6.00a (Wednesday)
> Texas: 8.00a
> New York: 9.00a
> Netherlands: 3.00p
> Israel: 4.00p
> Delhi: 6.30p
> South Australia: 10.30p
>
> We will have a discussion on the proposal that Ken Bakalar has sent
> across complimentary to the current discussion on wreal (additions to
> the wreal discussion). Ken - I am hoping you will be able to
> go through
> this during the upcoming call.
>
> I would also like to discuss some initial thoughts/plans on SV-AMS
> integration and continue with the initial effort that Graham
> had started
> on the integration, language comparison aspects (time
> permitting after
> Ken's proposal discussion).
>
> Regards,
> Sri
>
>
> --
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>
>
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Received on Wed May 12 06:53:24 2010

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