Hi -
I have some questions about multiple analog blocks, working from LRM 2.3.1.
In section 5.2, it says
Multiple analog blocks can also be used within a module declaration.
Refer section 7.1 for more details on multiple analog blocks
but 7.1 doesn't seem to be the right section. I found some more on
multiple analog blocks in 6.2, which says:
A module definition may have multiple analog blocks. The behavior
of multiple analog blocks shall be defined by assuming that the
multiple analog blocks internally combine into a single analog block
in the order that the analog blocks appear in the module description.
In other words, they are concatenated in the order they appear in the
module. Concurrent evaluation of the multiple analog blocks is
implementation dependent as long as the behavior in that case is
similar to what would happen if they had been concatenated.
What I don't see is any discussion of how one concatenates *named*
analog blocks -- and the scope of variables declared therein.
analog begin : block1
real x;
x = V(a);
I(a) <+ x * 1.0;
end
analog begin : block2
x = V(a);
I(a) <+ x * 2.0;
end
I would expect this to be illegal, since x is not declared in block2,
but I don't know what the concatenation looks like. And, if x had
been declared in block2, is the compiler required to keep block1.x
distinct from block2.x ?
-Geoffrey
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