The FVTC is currently conducting weekly subcommittee meetings. Specifically, there are three subcommittees:
· Alignment Subcommittee—which is tasked with working out the details for the unification and alignment of SystemVerilog assertions with PSL,
· LRM subcommittee—which is tasked with creating the version 1.1 LRM containing fixes to the 1.01 LRM in addition to all the new alignment work with SystemVerilog, and the
· Extension Subcommittee—which is tasked with considering future enhancements and extensions request.
The issues currently being tracked can be viewed at:
Participation in subcommittee work is opened to all and your active participation is encouraged. Please be serious about active participation.
Meetings are generally conducted every Thursday at 8:30am Pacific Time. The meeting on September 18 has been canceled, however meetings will continue the following week. Please check with Erich Marschner for latest weekly meeting schedule.
US: 877-634-9660
International: 203-566-6784
passcode: 727384
Meetings are generally conducted every Wednesday at 9:00am Pacific Time. The meeting on September 17 has been canceled, however meetings will continue the following week. Please check with Harry Foster for latest weekly meeting schedule.
US & Canada: 888-780-9115
International: 210-234-6494
passcode: 82354
A full committee meeting will occur in late September 2003. Please return to this page in mid-September for phone conference access information and exact schedule information.
Last update on