IEEE 200X Fast Track Change Proposal

ID:	        FT15

Proposer:     Ryan Hinton
email:        ryan.w.hinton@L-3com.com

Status:       Proposed
Proposed:     06/04
Analyzed:     Date
Resolved:     Date

Enhancement Summary:     Slices of multidimensional arrays and multi-level
slices and selections

Related issues:
Relevant LRM section:    6.3, 6.5

Enhancement Detail:
Slices and record selected names provide for selecting data from an object.
This proposal includes extending these concepts to more flexibly select data
from objects.  The proposed enhancements previously required loops to select
the desired data.

A.  Multidimensional Array Slices.
Slice names are extended to include multidimensional arrays.  The simplest
form includes a discrete range for each index.  The base type of the slice
prefix is the type of the slice.  Implicit subtype conversions are defined
and provided as for one-dimensional slices.

TYPE STD_LOGIC_MATRIX IS ARRAY(NATURAL RANGE <>, NATURAL RANGE <>) OF
STD_LOGIC;
SIGNAL Matrix : STD_LOGIC_MATRIX(1 TO 10, 1 T0 10);
SIGNAL Sub_Matrix : STD_LOGIC_MATRIX(1 TO 2, 1 TO 2);

Sub_Matrix <= Matrix(4 TO 5, 2 TO 3);  -- elements 4,2; 4,3; 5,2; and 5,3

The more complex form involves eliminating dimensions.  If scalar
expressions are provided for each index, it is an indexed name (previously
the only choice for multidimensional arrays) and the result is of the
element type.  If discrete ranges are provided for each index, it is a slice
name and the result is of the prefix base type.  If a combination of
discrete ranges and scalar expressions are provided, it is something else
altogether.  This form could be grouped with slice names, but a separate
(good?) name is preferable.  For now it will be called a decimated name
since the result has fewer dimensions than the prefix.  The result is an
anonymous array type with fewer indexes than the prefix.  The result will
always need a type cast to a named subtype.

SIGNAL Row : STD_LOGIC_VECTOR(1 TO 10);
SIGNAL Col : STD_LOGIC_VECTOR(1 TO 10);

Row <= STD_LOGIC_VECTOR(Matrix(6, Matrix'RANGE(2)));  -- sixth row
Col <= STD_LOGIC_VECTOR(Matrix(Matrix'RANGE(1), 2));  -- second column

The following is a more complete example.

TYPE STD_LOGIC_1DIM IS ARRAY(INTEGER RANGE <>) OF STD_LOGIC;
TYPE STD_LOGIC_2DIM IS ARRAY(INTEGER RANGE <>, INTEGER RANGE <>) OF
STD_LOGIC;
TYPE STD_LOGIC_3DIM IS ARRAY(INTEGER RANGE <>, INTEGER RANGE <>, INTEGER
RANGE <>) OF STD_LOGIC;

SIGNAL Matrix_xyz : STD_LOGIC_3DIM(-10 TO 10, -20 TO 20, -30 TO 30);
SIGNAL x_y_plane : STD_LOGIC_2DIM(-10 TO 10, -20 TO 20);
SIGNAL z_axis : STD_LOGIC_DIM(-30 TO 30);

x_y_plane <= STD_LOGIC_2DIM(Matrix_xyz(Matrix_xyz'RANGE(1),
Matrix_xyz'RANGE(2), 0));
z_axis <= STD_LOGIC_1DIM(Matrix_xyz(0, 0, Matrix_xyz'RANGE(3)));


B. Extended Selected Names
Selected names are extended to allow slices and selections across elements
of composite types.  If the prefix is an array, the suffix is either 
-- a parenthesized list of ranges (like a slice name), 
-- a parenthesized list of expressions (like an indexed name), or
-- a parenthesized list of a mixture of ranges and expressions (like a
decimated name).
For a record, the suffix must be a field name.  For an array the syntax
looks like this.

TYPE BYTE_VECTOR IS ARRAY(NATURAL RANGE <>) OF UNSIGNED(7 DOWNTO 0);
TYPE NIBBLE_VECTOR IS ARRAY(NATURAL RANGE <>) OF UNSIGNED(3 DOWNTO 0);

SIGNAL Bytes : BYTE_VECTOR(1 TO 10); 
SIGNAL Low_Nibbles : NIBBLE_VECTOR(1 TO 10);
SIGNAL High_Nibbles : NIBBLE_VECTOR(1 TO 8);

Low_Nibbles <= NIBBLE_VECTOR(Bytes(1 TO 10).(3 DOWNTO 0));
High_Nibbles <= NIBBLE_VECTOR(Bytes(2 TO 8).(7 DOWNTO 4));

For a record, the syntax looks like this.

TYPE COMPLEX_7BIT IS 
  RECORD
    re : SIGNED(6 DOWNTO 0);
    im : SIGNED(6 DOWNTO 0);
  END RECORD;
TYPE COMPLEX_7BIT_MATRIX IS ARRAY(NATURAL RANGE <>, NATURAL RANGE <>) OF
COMPLEX_7BIT;
TYPE SIGNED1_MATRIX IS ARRAY(NATURAL RANGE <>, NATURAL RANGE <>) OF SIGNED(0
DOWNTO 0);

SIGNAL Cplx_5x7 : COMPLEX_7BIT_MATRIX(1 TO 5, 1 TO 7);
SIGNAL Real_sign_bits : SIGNED1_MATRIX(0 TO 4, 0 TO 6);

Real_sign_bits <= SIGNED1_MATRIX(Cplx_5x7(1 TO 5, 1 TO 7).re.(6 DOWNTO 6));

Note that any selection in a record must pick exactly one field.  No
provisions are made for operations across several fields of a record since
they may be of different types.


Analysis:
To be completed by the VHDL-200x Fast Track working group.