IEEE 200X Fast Track Change Proposal ID: FT-28 Status: Proposed Proposed: David Bishop, 10/04, dbishop@vhdl.org Analyzed: 4-April-05 (Jim Lewis from meeting notes dated 2/28/2005) Resolved: Date Related issues: CP-002 (std_logic_1164) Relevant LRM sections: Enhancement/Requirements Summary: -------------------------------------------------------- Currently ROR, ROL, SLL, SLR, SLA, and SRA are implicitly defined only for arrays of bit and boolean. Going further, the definition for SLA is odd for positive values given the current definition of the numeric_std type math packages with the left-most bit begin the most significant bit. This is a roll-up of how to handle these functions for the various packages associated with this standard. Analysis/LRM Changes ---------------------------- 1) Explicitly define non-numeric shifts (sll, srl, rol, ror) for std_logic_1164 same as bit vectors including the value '0' 2) Explicitly define all shifts for unsigned, signed in numeric_std/numeric_bit. SLA, SLL, SRA, and SRL are as defined in the table below. sla sll sra srl -------------------------------------------------------------------------------------------- + signed | sll arg(arg'left-1:0)&0 arg(arg'left)&arg(arg'left:1) _0&arg(arg'left:1)_ - signed | sra (-cnt) srl(-cnt) sla(-cnt) sll(-cnt) + unsigned | sll arg(arg'left-1:0)&0 0&arg(arg'left:1) 0&arg(arg'left:1) - unsigned | sra (-cnt) srl(-cnt) sla(-cnt) sll(-cnt) 3) Explicitly define numeric shifts (sla, sra) for slv in numeric_std_unsigned identical to unsigned. Explicitly define numeric shifts (sla and sra) for bit_vector in numeric_bit_unsigned 4) For fixed point, the implementation for ufixed should match unsigned and sfixed should match signed. 5) Do not implement shift functions for floating point Resolution: ---------------------------- [To be performed by the 200X Fast Track Working Group]