SETUP/HOLD with bus as reference?

Alex Schreiber (Alex_Schreiber@avanticorp.com)
Tue, 18 May 1999 10:29:05 +0200

Hi,

Q: Is it possible to have a bus signal as reference for
SETUP/HOLD checks or do I need to split the bus signal
into its single bits and define them as single inputs?

If the bus solution is possible, how are the VITAL
generics to be defined?

Background:

I'm writing VITAL models for our memory compilers (cores).
There several instances of one memory can be combined together
to increase e.g. the word depth (bank option). Each single
memory is sensitive to a (hardwired) bank address, e.g. "10".

Because this bank address BA can start and terminate a write
cycle, SETUP and HOLD timings are defined in respect to BA.

In the SDF I get the following entries:

(SETUP WA[6] (posedge BA[1]) (0.000:0.000:0.000))
(SETUP WA[6] (negedge BA[0]) (0.000:0.000:0.000))

I.e. the address WA must meet a SETUP time in respect to
BA is becoming "10".

Thanks a lot in advance for your help,

Alex

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AVANT! Corporation 
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