Subject: FW: FDL01 Publicity
From: Dennis Brophy (dennisb@model.com)
Date: Wed Jul 11 2001 - 12:37:36 PDT
****************************************************************************
**********************************
We apologize, if you receive this message more than once.
This message contains public information, and the receiver is allowed and
invited to copy it and distribute it further.
****************************************************************************
**********************************
FORUM on DESIGN LANGUAGES
Lyon, France - September 3-7, 2001
A SIG-VHDL event sponsored by ECSI,
co-sponsors : ENS Lyon and INSA Lyon
co-sponsored with no financial implication : Accellera, ACM-SIGDA, IEE, IFIP
10.5, ITG, GI, GMM, VDE, SEE, VSIA
ADVANCE PROGRAM AVAILABLE ON
http://www.ecsi.org/ <http://www.ecsi.org/fdl> fdl
<http://www.ecsi.org/fdl>
The Forum on Design Languages (FDL) is the European forum to exchange
experiences and learn of new trends, in the application associated design
methods and tools, to design electronic systems. By offering several
co-located events, this multi-faceted forum gives an excellent opportunity
to gain up-to-date knowledge across a wide field.
The forum is organized around several interrelated workshops with working
sessions and technical discussion.
The workshop on hardware description languages started on 1989 with VUFE.
This year it addresses standardization efforts at different abstraction
levels, analog and mixed signal as well as C/C++ based languages.
Tuesday hosts Hardware Description Languages (HDL) sessions together with
C/C++ based HW/SW Specification & Design (CCSD) sessions.
On Wednesday, CCSD continues and Analog & Mixed Signal Specification (AMS)
begins.
The Design Environments & Languages (DEL) workshop, on Tuesday, is dedicated
to EDA distributed environments that mostly come with a combination of
graphical and textual design languages.
System Specification & Design Languages (SSDL) started in 1996, as SLDL, to
address the need of specifying embedded systems or systems-on-chip. In
FDL01, on Wednesday and Thursday, SSDL also includes Real Time
Specification for Embedded Systems (RTSE) and Architecture Modeling and
Reuse (AMR).
In addition, five half-day tutorials are provided on Monday to introduce the
field. Interested participants select two tutorials.
During the forum, attendees are also able to freely follow hands-on-labs on
Windows NT or Unix Solaris workstations.
Looking forward to welcoming you in Lyon!
This archive was generated by hypermail 2b28 : Wed Jul 11 2001 - 13:29:46 PDT