This data item contains VHDL behavioral descriptions for 19 TTL SSI part models,
along with the functional logic package and the WAVES packages and test benches used
to simulate the models.

Contract:  MDA972-88-J-0003 

Models:
-------
  SN54368    - hex inverting bus driver
  SN5438     - quad 2-input NAND with open-collector outputs
  SN54LS00   - quad 2-input NAND
  SN54LS04   - hex inverter
  SN54LS109  - dual J-K Flip-Flop
  SN54LS112  - dual J-K Flip-Flop
  SN54LS161  - 4-bit binary counter
  SN54S00    - quad 2-input NAND
  SN54S02    - quad 2-input NOR
  SN54S04    - hex inverter
  SN54S08    - quad 2-input AND
  SN54S11    - triple 3-input NAND
  SN54S112   - dual J-K Flip-Flop
  SN54S138   - 3-to-8 decoder
  SN54S140   - dual 4-input NAND
  SN54S175   - quad D-latch
  SN54S251   - 8-to-1 multiplexor
  SN54S280   - 9-bit even/odd parity generator/checker
  SN54S86    - quad 2-input XOR

Files common to all 19 parts:
-----------------------------
  BASICDEFS_.vhd - functional logic package declaration
  BASICDEFS.vhd  - functional logic package body
  waves_standard_.vhd - basic WAVES definition package declaration
  waves_standard.vhd  - waves_standard package body
  waves_events_.vhd - package which links events to logic values
  waves_events.vhd  - waves_events package body
  waves_port_.vhd - package which defines type of interface of WAVES dataset
  waves_port.vhd  - waves_port package body
  waves_interface_.vhd - package which defines functions for application of
                         input values and for file input of test vectors
  waves_interface.vhd  - waves_interface package body
  waves_frames_.vhd - package which links event values to pin codes
  waves_frames.vhd  - waves_frames package body
  waves_objects_.vhd - package which defines functions that create slices
  waves_objects.vhd  - waves_objects package body
  waves_utilities_.vhd - package which defines functions to check responses
                         and to output port values to a file
  waves_utilities.vhd  - waves_utilities package body
  
Files specific to each model:
-----------------------------
  waves_device_<part_name>_.vhd - package which describes the test pins
  waves_device_<part_name>.vhd  - waves_device package body
  <part_name>_SIMFLAG_.vhd - user-selectable options package
  <part_name>_SIMFLAG.vhd  - user-selectable options package body
  <part_name>.tim.vhd - timing module package and package body
  <part_name>_.vhd - entity declaration
  <part_name>.vhd  - architecture declaration
  wgenerator_<part_name>_.vhd - WAVES test program package
  wgenerator_<part_name>.vhd  - WAVES test program package body
  <part_name>_TB_.vhd - test bench entity
  <part_name>_TB.vhd  - test bench architecture