--
--
--                                   DISCLAIMER
--
--        This code is the sole property of the Institute for Technology
--        Development (ITD), Jackson, Mississippi, and is distributed for
--        the purpose of providing examples of VHDL models written to
--        modeling standards.  This code may not be used for commercial
--        purposes, and may not be redistributed without permission from
--        the Institute for Technology Development.  ITD assumes no 
--        responsibility for errors, omissions, uses made, or decisions
--        based on its use.  No warranties, expressed or implied, are given.
--
--        ------------------------------------------------------------------

--------------------------------------------------------------------
-- FILENAME:    SIMFLAG_.VHD 
-- Description: User-selectable options declaration file
--------------------------------------------------------------------

package SIMFLAG IS

  SUBTYPE voltage IS REAL;
  SUBTYPE temperature IS REAL;
  SUBTYPE percentage IS REAL;

  TYPE flags IS (GLOBAL,LOCAL);
    -- GLOBAL - select user's flag definitions in SIMFLAG package
    -- LOCAL  - select default flag definitions in get_timing() function
  
  TYPE sim_options IS (NO_TIM,ONLY_X,ONLY_DISPLAY,FULL_TIM);
    -- NO_TIM        - inhibit timing violation checks, X's are not generated
    -- ONLY_X        - inhibit timing violation checks, X's are generated
    -- ONLY DISPLAY  - enable timing violation checks,  X's are not generated
    -- FULL_TIM      - enable timing violation checks,  X's are generated
  
  TYPE time_modes IS (GENERIC_VALUES,TIMING,ANNOTATED);
    -- GENERIC_VALUES - Run simulation with default times from entity
    -- TIMING         - Run simulation with time selection values
    -- ANNOTATED      - Run simulation with back annotated values
    
  TYPE time_options IS (MINIMUM,TYPICAL,MAXIMUM);
    -- MINIMUM   - Simulate with minimum propagation delay times
    -- TYPICAL   - Simulate with typical propagation delay times
    -- MAXIMUM   - Simulate with maximum propagation delay times
  
  -- deferred CONSTANT DECLARATIONS
  
  CONSTANT FLAG_TYPE      : flags;
  CONSTANT SIM_OPTION     : sim_options;
  CONSTANT TIME_MODE      : time_modes;
  CONSTANT TIME_OPTION    : time_options;
  CONSTANT Vcc            : voltage;
  CONSTANT Ta             : temperature;
  CONSTANT DERATE_FACTOR  : percentage;

end SIMFLAG;