**************************************************************************** *** VHDL Users' Group DIGEST: Volume 2, No. 1 Nov - Jan 1989 *** **************************************************************************** Msg # 10 Dated 11-03-89 09:15:29 From: CHUCK STAATSE To: ALL Re: SELECTING CAE SYSTEM We are looking at CAE system that support VHDL. At the risk of starting a fire (with flames) could some of you who have been using VHDL comment on your systems? Thanks Chuck ( I can take the heat!) Staatse Msg # 12 Dated 11-08-89 22:55:58 From: SYSOP To: ALL Re: VHDL STANDARD For those who may be interested, VHDL became an ANSI standard (in addition to the IEEE status) the end of October. It is expected to become an NIST FIP Standard in the near future also. Msg # 22 Dated 11-21-89 14:49:44 From: SYSOP To: ALL Re: SUB-BOARDS There seems to be be a bug in the sub-board message system. Until I can get it resolved the sub-boards are deactivated. This should not pose too much of a problem as only one user has tried using them! You are welcome to still conduct VDEG and VASG discussions in the normal message system. For those of you who were finding a busy signal or unanswered line -- this was due mostly to fatal crashes of the BBS due to the bug. Although many steps are built-in to allow automatic reboot on failure, this one particular problem is causing a soft-soft crash which never allows the reboot! You should find the system more accessable now. Msg # 29 Dated 11-30-89 22:50:12 From: SYSOP To: ALL Re: VHDL TOOLS Many people have been asking for experience with different tools and apologizing for maybe causing heated discussions in doing so. So where is the discussion? Without intentionally wanting to create heat, here are some of my comments. My direct experience to date has been in using the Intermetrics, Zycad and Vantage tool sets. Each has unique advantages depending on your needs. All are fairly complete implementations of IEEE VHDL 1076. Zycad's system seems to be the most robust and complete but all three are fairly good. Intermetrics has by far the largest installed base and therefore is the most useful for trading experience, vectors, and command files. For various reasons, its compiler is still slow compared to the other implementations on the VAX/VMS. The Sun version (once completely up) is supposed to fix some of this. Vantage has some nice features for doing true hardware (schematic) design and debug. These are independent of the VHDL environment. Also, there support environment (standard package, etc.) is nice for promoting a modeling methodology that is efficient to simulate. ZYCAD is a screamer when it comes to compile times (unofficial results are floating around in the mist but no one seems ready to release direct comparisons!). A benchmark I have heard about (source to remain anonymous unless they expose themselves) is that all three implementations are having problems with large, real world designs (flattened netlist, 12,000 instantiated components, 25,000+ signals, etc.). Well, that is all the coals I am willing to stir for now. Anyone want to through some more wood in the embers? Msg # 36 Dated 12-06-89 17:16:31 From: SYSOP To: RAY RAMOS Re: (R)COMMENT VHDL is an ANSI/IEEE standard hardware description language. Just about every trade journal and IEEE Computer Society publication has been reporting on the standard over the last three years. See IEEE Design and Test, April 1986 (Whole issue) or EDN Cover Story (March 15 1989). Check the bulletins on how to order copies of the standard or related documents. Leave your name and address to get on the member list if interested. From: SYSOP To: ALL Re: UNATTENDED SYSTEM This system will be unattended (no SYSOP response) until 10 January. Sorry if it poses any inconvenience. Note that someone with SYSOP privelages will be checking the system daily to maintain and backup the file systems. Thanks. Msg # 44 Dated 12-13-89 08:35:21 From: TONY BARANYI To: ALL Re: VHDL MODELS , ETC. This is a follow-up to my query on VHDL interchangability and Randy's comments on his experience ( messages 23 & 29 ) . We're still at the stage where we are trying to decide which VHDL implementation to buy . No offense to any Vendors present , but unless we can verify exchange of models between systems we are going to assume the worst ( i.e. , that it's like the CALS world where one vendor's IGES often doesn't play well on another vendor's platform . ) . I would like to hear of real excanges of models between platforms and better yet , maybe have a quasi-"standard" model for testing exchange put up on this BBS for us to try out . Any comments ? Msg # 46 Dated 12-16-89 22:11:50 From: CHARLES CLARK To: ALL Re: VDHL TOOLS FOR BERKELEY? Is anyone aware of VDHL tools developed for the Berkely Design Tools fro VLSI? (Includes Magic layout editor, ESIM & RSIM, MPLA, EQNTOTT, ESPRESSO, MEG & PEG, etc.) Msg # 51 Dated 01-03-90 12:48:13 From: JOHN WINKLER To: ALL Re: RE-VHDL MODELS , ETC. We have been working with three simulators, and all I can say is things are getting better, but there is still away to go befor full portability is achieved. Unfortunately the subsets available now don't overlap enough so we are limited to a quite restricted subset. . As to the selection of a tool, I believe that it very much depends on the end users requirements. The basic differentiation that we've seen has been in user environments and platforms. I think that it is likely that all the major players will have reasonable coverage in '90 so full compliance shouldn't be the gating item.