MIL-STD-454L, Requirement 64: Microelectronic Devices "4. Requirements 4.5 Device design and test documentation 4.5.1 ASIC Documentation in VHDL. Digital Application-Specific Integrated Circuits (ASICs) designed after 30 September 1988 shall be documented by means of structural and behavioral VHSIC Hardware Description Language (VHDL) descriptions in accordance with IEEE 1076. Behavioral VHDL descriptions shall describe the input/output behavior at a sufficiently detailed level to permit the behavioral description to be used within a larger VHDL model for test generation and fault grading of the containing model. 4.5.2 Fault Coverage. Fault coverage shall be reported for the manufacturing-level logic tests for all digital microcircuits designed after 30 September 1988. Fault coverage shall be based on the equivalence classes of single, permanent, stuck-at-zero and stuck-at-one faults on all lines of a TISSS compatible structural VHDL model, where the structural model is expressed in terms of gate-level primitives or simple "atomic" functions (such as flip-flops). Large, regular structures such as RAMs and ROMs shall not be modeled at the "gate" level, but rather documentation shall be provided that these structures are tested using appropriate algorithms (such as galloping patterns for a RAM)." "5. Information for Guidance Only 5.5 Testability. New and upgraded systems should exploit ship level built-in-test features to enhance the testability and operational availability of the module or system. When advanced digital modules or boards are developed, microcircuits incorporating the VHSIC ETM-BUS or VHSIC TM-BUS should be used. (see VHSIC Interoperability Standards.)" ------------------------------------------------------------------------------------ This document transcribed from the original courtesy of C.A.D.onomists 127 Beaumont Avenue San Francisco, CA 94118