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PROMS: addresses for controlling programmable resets / reset polarity ofXilinx PROMs (Data I/O programmers only)


Record #188

Product Family:  Hardware

Product Line:  1700

Problem Title:
PROMS: addresses for controlling programmable resets / reset polarity
ofXilinx PROMs (Data I/O programmers only)



Problem Description:
Keywords: programmable, reset, polarity, prom, programmer,
Data I/O

Urgency: standard

General Description:
The Xilinx specification for Xilinx PROM programmers specifies
that the polarity of the PROM Reset pin be set automatically
by the programmer interface software.  For example, the Xilinx
XPP and HW130 software both prompt the user for the desired
polarity at the beginning of the programming process, and
the actual procedure is transparent to the user.

However, at one point this was not supported by Data I/O
programming software.  For Data I/O programmers, the polarity
of the PROM Reset pin must be programmed by loading either 1's
or 0's into the appropriate addresses in memory--specifically
4 device-specific, contiguous address locations.

To program:

active high reset -> fill the area with ones
		     (fill each address location with FFH)

active low reset  -> fill the area with zeros
		     (fill each address location with 00H)



Solution 1:

The memory locations of the programmable reset (in hex) are as follows:

1700 Series Proms:
----------------------------

1718D/L 	 8DC - 8DF
1736D/E/EL	 11B8 - 11BB
1765D/L/E/EL	 2000 - 2003
17128/D/L/E/EL	 4000 - 4003
17256D/L/E/EL	 8000 - 8003
17512/L 	 10000 - 10003
1701/L		 20000 - 20003


SPARTAN Proms:
----------------------------

S05		 2000 - 2003
S05XL		 4000 - 4003
S10		 4000 - 4003
S10XL		 4000 - 4003
S20		 8000 - 8003
S20XL		 8000 - 8003
S30		 8000 - 8003
S30XL		 8000 - 8003
S40		 10000 - 10003
S40XL		 10000 - 10003

Certain third party programmers may map these addresses to
different memory locations.



End of Record #188

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