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Xsimmake 5.2: Error message says to run functional simulation


Record #316

Product Family:  Software

Product Line:  FPGA Core

Problem Title:
Xsimmake 5.2: Error message says to run functional simulation


Problem Description:
If your design contains any Xilinx ABEL, X-BLOX, or MemGen blocks, you have to r
un XSimMake with the functional flow before running XSimmake with the timing flo
w, if your design contains any Xilinx ABEL, X-BLOX, or MemGen blocks.


Solution 1:

The functional flow does a lot of preliminary work that is required for the timi
ng flow.  For Viewlogic, it creates both a simulation schematic and a functional
 VSM file that is necessary for timing simulation.

If you do not have any of these special blocks in your design, then you can just
 create a VSM file from the schematic.	The restriction is that you must have in
 the current directory all the files needed to create the functional VSM file.




End of Record #316

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