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PPR 5.0: CST file constraints do not override schematic constraints


Record #328

Problem Title:
PPR 5.0: CST file constraints do not override schematic constraints


Problem Description:



Solution 1:




If a symbol is constrained to a particular location by a LOC parameter,
and if that same symbol is constrained to a different location in a CST
file, PPR V5.0 does not override the LOC parameter constraint with the CST
file constraint. Instead, the two locations are combined, and the symbol
is allowed to go into either location. Previous versions of PPR handled
this the same way, effectively performing an "or" between the two
constraints.

If you have CST file constraints that are designed to override constraints
eneter by LOC parameters, you must either remove the LOCs from the
schematic or expicitly ignore them.  PPR V5.0 allows you to ignore I/O LOCs
and/or interior-logic LOCs using a command line option:

*	To ingore all I/O LOCs in the input schematic, use the option
	ignore_xnf_locs=io

*	To ignore all interior-type LOCS - that is, those on CLB logic, BUFTs,
	and XC4000 family decoders - use ignore_xnf_locs=interior

*	To ignore all LOCs in the design, use ignore_xnf_locs=all




End of Record #328