Return to Support Page
 homesearchagentssupportask xilinxmap

Answers Database


XBLOX 5.x and Viewsim/PROsim: Possible cause of contention ("X" values) on busses


Record #402

Product Family:  Software

Product Line:  ViewLogic

Problem Title:
XBLOX 5.x and Viewsim/PROsim: Possible cause of contention ("X" values)
on busses



Problem Description:
Functional simulation of an XBLOX bus in Viewlogic results in only X's at
the output, indicating contention on the bus.  Why?

If an XBLOX bus is connected via a bus interface (BUS_IF) symbol to a
standard ViewLogic bus, it may seem logical to name the two busses
similarly--for example, an XBLOX bus named DATA connected to a standard bus
named DATA[7:0].  The problem with this is that, after expansion by XBLOX,
you will end up with two similarly named bus segments connected by
buffers. The buffers then contend with whatever was actually supposed to
drive the bus.

The same situation applies to ELEMENTS--for example, an XBLOX bus named
DATA connected to an ELEMENT with ELEM=4 driving a net named DATA4.


Solution 1:

Rename either the input or output bus/net to the BUS_IF/ELEMENT primitive.



End of Record #402

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Xilinx Expert Journals!

© 1998 Xilinx, Inc. All rights reserved
Trademarks and Patents