Answers Database

PPR issues ERROR 6105 due to XBLOX mapping down counter incorrectly


Record #470

Product Family:  Software

Product Line:  FPGA Core

Problem Title:
PPR issues ERROR 6105 due to XBLOX mapping down counter incorrectly


Problem Description:
PPR issues an error message similar to the following on an FMAP symbol
associated with an XBLOX down counter:

    *** PPR: ERROR 6105:
	  The MAP symbol 'TTLA/FMAP8_1_g' (output signal=
	  TTLA/OR5_REG_ffy_1) can not be obeyed.

	  The following input signals are specifiled on the MAP symbol:
	  TTLA/BUF15_SAT_ffy_1
	  A<3>
	  LOAD
	  TC
	  However, the gates that generate the signal TTLA/OR5_REG_ffy_1
	  have the following input signals:
	  $1I1_1/BUF15_SAT_ffy_1
	  LOAD
	  A<3>
	  Check that the input and output signals assigned to the MAP
	  completely enclose the intended logic.

XBLOX 5.0 creates relationally placed macros (RPMs) for counters that are
wider than 12 bits or have the attribute USE_RLOC=TRUE.  For down counters
that satisfy one of these criteria, XBLOX makes erroneous connections to
MAP inputs.  In some cases it will connect an unrelated signal to an input
of the MAP symbol.  In other cases it will leave signals unconnected that
should be connected to an input of the MAP symbol.


Solution 1:

To make a down counter you connect a GND symbol to the UP_DN pin of the
COUNTER symbol.  You can fool XBLOX into thinking the counter is an up/down
counter by connecting a BUF symbol between the UP_DN pin on the COUNTER
symbol and the GND symbol.  When XNFPREP is run after XBLOX it will trim
the logic back down to a down counter, EXCEPT that the dedicated carry
logic will still be configured as up/down with a grounded function control.
This may affect routability of the design, since this function control will
use up routing resorces to implement the function control.  For best
results, use XBLOX 5.1 or later.



End of Record #470