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XC4000, SYNOPSYS FPGA Compiler: Example .synopsys_dc.setup file


Record #533

Problem Title:
XC4000, SYNOPSYS FPGA Compiler: Example .synopsys_dc.setup file


Problem Description:



Solution 1:




PROGRAM: Synopsys- FPGA Compiler

VERSION: 3.2a

PLATFORM(s): Sparc, Hp700

LINK TO:

SHORT DESCRIPTION: Example of a .synopsys_dc.setup file for Synopsys' FPGA
		   Compiler (XC4000)



LONG DESCRIPTION: Here is an example of a .synopsys_dc.setup file for Synopsys'

		  FPGA Compiler. This may be used as a template file. Make
		  sure that you edit the search path to point to the correct
		  location of the libraries. This file exists on line in
		  $DS401/examples/synopsys/fc4k.synopsys_dc.setup.
		  $DS401 is the directory in which the DS401 (XSI) is installed.




SOLUTION:

/* EXAMPLE FPGA COMPILER STARTUP FILE - .synopsys_dc.setup */
/* FOR XC4000/A/H/D PARTYPES				   */

search_path = { .	\
	<DS401-XACT-Directory>/synopsys/libraries/syn \
	<SYNOPSYS_Directory>/libraries/syn}

link_library = {xprim_4005-5.db xprim_4000-5.db xgen_4000.db \
	xio_4000-5.db xfpga_4000-5.db}

target_library = {xprim_4005-5.db xprim_4000-5.db xgen_4000.db \
	xio_4000-5.db xfpga_4000-5.db}

symbol_library = xc4000.sdb

define_design_lib WORK -path ./WORK

define_design_lib xblox_4000 -path \
	<DS401-XACT-Directory>/synopsys/libraries/dw/lib/fpga

synthetic_library = {xblox_4000.sldb standard.sldb}

compile_fix_multiple_port_nets = true

xlnx_hier_blknm = 1

xnfout_library_version = "2.0.0"

bus_naming_style = "%s<%d>"
bus_dimension_separator_style = "><"
bus_inference_style = "%s<%d>"




End of Record #533