Return to Support Page
 homesearchagentssupportask xilinxmap

Answers Database


FPGA COMPILER: PULLUPs/PULLDOWNs must be instantiated when using Synopsys.


Record #564

Product Family:  Software

Product Line:  Synopsys

Problem Title:
FPGA COMPILER: PULLUPs/PULLDOWNs must be instantiated when using
Synopsys.



Problem Description:

Can PULLUPs and PULLDOWNs be inferred  or do they have to be instantiated ?


Solution 1:

PULLUP and PULLDOWN components may be inferred on pad connections of input and
output cells. These I/O cells have attributes that allow you to infer PULLUP or
PULLDOWN
resistors using the set_pad_type command in Synopsys tools.
For example, to attach a PULLUP resistor to an input port named INPUT1, type:

set_pad_type -pullup INPUT1

Internal PULLUPs must be INSTANTIATED, they cannot be inferred.





End of Record #564

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Xilinx Expert Journals!

© 1998 Xilinx, Inc. All rights reserved
Trademarks and Patents