Answers Database
Hardware Debugger 6.0.1: Nets split during implementation are shown as split nets in available signals list
Record #834
Product Family: Software
Product Line: FPGA Core
Problem Title:
Hardware Debugger 6.0.1: Nets split during implementation are shown as
split nets in available signals list
Problem Description:
Split nets are nets that are created when the implementation software needs
to route a particular net from one source to multiple loads and uses CLBs to
split the original net creating several "source" connections. When split
nets are created, all the nets will appear in the available signals list
boxes.
Solution 1:
When split nets are displayed in the available signals list box, any one of
the nets can be chosen to be displayed in a waveform or used to create a
group. Typically, the smallest split net should be chosen. When the design
is re-implemented, the split nets chosen may need to be re-added to the
display list or to any groups which reference them.
End of Record #834
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