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Hardware Debugger 6.0.1: 1st readback may fail after a verify performed in the middle of several readbacks


Record #850

Product Family:  Software

Product Line:  FPGA Core

Problem Title:
Hardware Debugger 6.0.1: 1st readback may fail after a verify performed
in the middle of several readbacks



Problem Description:
If several readbacks are performed, and then the device being read back is
verified, the next readback may fail.


Solution 1:

Should a readback fail, re-issue the readback command by clicking on the Read
button in the Control Panel or selecting the Read FPGA command from the Debug
menu.



End of Record #850