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Differences between DS550 (EPLD) software versions 5.x and 6.0


Record #868

Product Family:  Hardware

Product Line:  7300

Problem Title:
Differences between DS550 (EPLD) software versions 5.x and 6.0


Problem Description:
Confusion sometimes arises as to how the EPLD Core Software has changed with
the recent release of XACTStep 5.2/6.0.  This solution record will outline
some of the more significant differences.


Solution 1:

Version 5.2 is basically the same as version 5.1, with bug fixes.
Version 6.0 contains a new fitter and optimizer, and several functional
enhancements.

PLATFORM SUPPORT
================
Version 5.2 supports ONLY workstations
     HP (HP-UX)
     SUN (Sun-OS)
     RS6000

Version 6.0 supports ONLY PCs (Windows)

** There is NO DOS FLOW for XEPLD v5.2/6.0 **

PAL INTEGRATION
==============
Version 5.2 uses PALCONVT and JED2PLD utilities

For the PC, use XABEL-CPLD (DS571) for PAL Integration.  This method allows
the use of hierarchy, JEDEC conversion for over 100 PALs, and functional
simulation.  All of these functions were not available with versions 5.x.

FITTED DESIGN DATABASE FILE
=======================
Version 5.2 -  <design>.vmh or <design>.vmd for xc7272

Version 6.0 -  <design>.vm6

TIMING CONSTRAINTS
=================
Version 5.2 does not allow for use of timing constraints.

Version 6.0 uses XACT-Performance Timespecs, placed either on schematic,
or in .cst file.

TIMING ANALYSIS
=============
Version 5.2 uses 5.1-style timerpt utility

Version 6.0 uses Timing Analyzer v6.0.

* Designs compiled with v5.2 software should not be analyzed with the Timing
  Analyzer v6.0, and vice-versa.

PIN LOCKING
==========
Version 5.2 uses the .vmf file

Version 6.0 uses the .gyd file or .vmf file.  .Gyd file contains design
optimization information as well, which will improve pin-locking
capability.






End of Record #868

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