Answers Database

LCA2XNF may use unit delays (functional) in timing simulation flow


Record #1085

Product Family:  Software

Product Line:  FPGA Core

Problem Title:
LCA2XNF may use unit delays (functional) in timing simulation flow


Problem Description:
A user may observe in some cases, his timing simulation looks like a
functional simulation.	This can be caused by LCA2XNF writing out an XNF file wi
th no delay information annotated.  LCA2XNF may do this if the LCA file has
DRC errors; it will use unit delays instead.  If XSIMMAKE was run, this will
be reported in the XSIMMAKE.OUT file (WARNING 23).


Solution 1:

Run a DRC check via XDE or Makebits to check if the LCA file is really OK.
If there are any errors, you must re-run PPR and/or adjust your design until
DRC check passes.  PPR will sometimes produce LCA files that have DRC errors.
These errors are normally caught when Makebits is run, since Makebits runs
the DRC check automatically, but there is no such filter in Xsimmake.



End of Record #1085