Return to Support Page
 homesearchagentssupportask xilinxmap

Answers Database


9500 BSDL File pin_map_string pin description and FPGA pin_map_string description


Record #1233

Problem Title:
9500 BSDL File pin_map_string pin description and FPGA pin_map_string
description



Problem Description:
In BSDL files, there is a section called the 'pin_map_string'
section, which describes all the pins on a device.  Some
JTAG software packages may not like the 9500
'pin_map_string' syntax, since the pin numbers in this section
are prefixed with the string 'PIN'.  For example:

constant PQ_100: PIN_MAP_STRING:=
	"PB00_01:PIN15," &
	"PB00_02:PIN16," &
	"PB00_03:PIN21," &
	"PB00_04:PIN17," &


If the user's software doesn't like this, the user's JTAG software
will complain about the pin_map_string section of the file.  This
syntax in the pin_map_string section is legal.	The IEEE 1149.1
specification doesn't specify that pin 'numbers' must be used
in the pin_map_string section. In the current IEEE JTAG spec,
which is IEEE std 1149.1b-1994, the pins in the pin_mapstring
are defined on page 17, section B.8.7.1:

<pin ID> ::= <VHDL identifier> | integer

which means that a pin can be described as a string, number, or
combination of letters and strings.  This allows packages like
BGA's to be described.	The 9500 BSDL files are checked for syntax.


Solution 1:

Change the pin_map_string section by remvoing the 'PIN'
string from the pin_map_string section.  For example,
the below:


constant PQ_100: PIN_MAP_STRING:=
	"PB00_01:PIN15," &
	"PB00_02:PIN16," &
	"PB00_03:PIN21," &
	"PB00_04:PIN17," &


would become:


constant PQ_100: PIN_MAP_STRING:=
	"PB00_01:15," &
	"PB00_02:16," &
	"PB00_03:21," &
	"PB00_04:17," &




End of Record #1233

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Xilinx Expert Journals!

© 1998 Xilinx, Inc. All rights reserved
Trademarks and Patents