Answers Database

PCI macro: Changing an Initiator to a Target design requires extra steps


Record #1277

Product Family:  Software

Product Line:  Logicore

Problem Title:
PCI macro: Changing an Initiator to a Target design requires extra steps


Problem Description:
The documentation shows this way to change a master to a slave:

"To change the Target/Initiator design (default) into a Target-Only
function,
1. Open the schematic named pci_lc_i.1.
2. Select the symbol currently called master.
3. Use the VIEWlogic Powerview 'Change Component'
command to replace the master symbol with slave.
	ccomp slave"

However, you may experience some problems. The known problems
are listed below along with their solutions.


Solution 1:

If you use the i13p208.cst file on a design where the master.1 symbol
in the pci_lc_i schematic was changed to target.1, you may get the
following errors:

    XNFPREP: ERROR 7852:
      The following signal specification (in the TIMEGRP definition
      'SRC_EN_FFS2') was not matched in the design.

      FFS matched by PCI_LC_I/IFRAME-
      FFS matched by PCI_LC_I/GNT-


    XNFPREP: ERROR 7852:
      The following signal specification (in the TIMEGRP definition
      'SRC_EN_FFS1') was not matched in the design.

      FFS matched by PCI_LC_I/M_DATA1
      FFS matched by DEVSELQ-


The .cst file refers to specific ff's that no longer exist in the design.
To solve this problem modify the i13p208.cst file.

Change these two lines:
TIMEGRP = "SRC_EN_FFS1=FFS(PCI_LC_I/M_DATA1:IRDYQ-:IDLE:DEVSELQ-)";
TIMEGRP = "SRC_EN_FFS2=FFS(PCI_LC_I/IFRAME-:PCI_LC_I/GNT-:PCI_LC_I/TTRDY-)";

to
TIMEGRP = "SRC_EN_FFS1=FFS(IRDYQ-:IDLE)";
TIMEGRP = "SRC_EN_FFS2=FFS(PCI_LC_I/TTRDY-)";



Solution 2:

If you attemp to compile the pci_test version of the design after
changing it to a target, you may get these errors:

    XNFPREP Errors
    --------------
    XNFPREP: ERROR 3649:
      The signal `M_CBE3' has multiple sources:

      Symbol Type = AND ; Pin Name = O ; Symbol Name =
      TESTBNCH/CBE_OUTPUTS/$1I4
      Symbol Type = BUF ; Pin Name = O ; Symbol Name =
      PCI_LC_I/INITIATOR_CNTL/$1I2793

      Please check the schematic for duplicate signal names.

      If the signal is connected to the INPUTS pin of BIDIR_IO symbol,
      then please ensure that its IE pin is connected.


This can be prevented by removing the M_CBE[3:0] bus between the testbnch
and the pci_lc_i.




End of Record #1277