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XNF2VERILOG/TIMENETX: Missing inversion on inverted T pin of obuft


Record #1292

Product Family:  Software

Product Line:  Cadence

Problem Title:
XNF2VERILOG/TIMENETX: Missing inversion on inverted T pin of obuft


Problem Description:
keywords: invert drop obuft T pin xnf2verilog x2vprep timenetx

Urgency: standard

General Description:
An inverter feeding the T pin of an OBUFT gets merged into the
OBUFT because the T pin is invertible.	In the XNF file this
merged condition is represented by attaching an INV, or
inversion, property to the T pin of the OBUFT.


Solution 1:

Users may find that the inversion is lost if they run
XNF2VERILOG directly on the routed XNF output they obtain from LCA2XNF.

The reason this happens is because XNF2VERILOG is not meant to
be used standalone.  The proper processing of a routed design
for Verilog timing simulation in the XACT flow requires that
you run TIMENETX on the routed .LCA file.

If run standalone, XNF2VERILOG keys off the SCHNM property
associated with a SYMBOL (SYM) record, ignoring any properties
that may be attached to that symbol's pins.  TIMENETX fixes
this problem when it calls X2VPREP, which substitutes the INV
property in the XNF file with an INV symbol so that
XNF2VERILOG can process it properly.



End of Record #1292

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