Answers Database

PPR error 7019 : Qualifier "[pattern]" on [spec_type] spec doesn't matchany [direction] pad.


Record #1314

Product Family:  Software

Product Line:  FPGA Core

Problem Title:
PPR error 7019 : Qualifier "[pattern]" on [spec_type] spec doesn't
matchany [direction] pad.



Problem Description:
During compilation of an FPGA design with the XACT tools, PPR may issue the foll
owing error :

PPR error 7019 : Qualifier "[pattern]" on [spec_type] spec doesn't match any [di
rection] pad.


Solution 1:

If the design was created using Synopsys FPGA Compiler, this error may be caused
 by Synopsys issuing a timespec in the .sxnf file on a port or register which go
t optimized out during the XNFPREP stage of processing the design.  If this is t
he case, add the line to your Synopsys script or at the DC Shell prompt type :

xnfout_constraints_per_endpoint=0

before you write out the .sxnf file.  This will disable Synopsys from writing ou
t timing contraints to the .sxnf file.	If you wish to add timing constraints to
 your design, you should do so from a constraints (.cst) file.



Solution 2:

Another possible cause of this error is when a synthesized CLB flip-flop (DFF) b
y Synopsys is merged into an IOB by a subequent run of XBLOX on the design.

To prevent XBLOX from merging the flip-flop into an IOB, run XBLOX with the "mer
geio=false" option as shown :

xblox <design> mergeio=false



End of Record #1314