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Foundation XVHDL: How to specify FAST Slew rate


Record #1377

Product Family:  Software

Product Line:  Metamor

Problem Title:
Foundation XVHDL:  How to specify FAST Slew rate


Problem Description:
Keywords:  slew, fast, slow, Metamor

Versions:  F6.x, F1.3/F1.4

Urgency:  Standard

General Description:

Output slew rate may be set on a pad-by-pad basis for the
XC3000, XC4000, XC5200, and XC9500 families, as well as the
XC73144 device.  The default slew rate is 'SLOW'.  To change
the slew rate to 'FAST', use the following syntax in you
XVHDL design:

attribute FAST:  boolean;
attribute FAST of DOUT: signal is true;

**Note that this solution applies to the Metamor XVHDL compiler
only.  If using the Express HDL compiler, you must set the
Slew rate through the Express Constraints GUI as explained in
(Xilinx Solution 1483).


Solution 1:

--Example of specifying FAST slew rate on an output pin

library IEEE;
use IEEE.std_logic_1164.all;

entity FAST_OUT is
   port (CLK, DIN, RESET: in std_logic;
	 DOUT: out std_logic);
   attribute FAST:  boolean;
   attribute FAST of DOUT: signal is true;
      --assigns FAST slew rate to DOUT
end FAST_OUT;

architecture FASTSLEW of FAST_OUT is
begin
   process (CLK, RESET)
   begin
      if RESET='1' then
	DOUT <= '0';
     elsif (CLK'event and CLK='1') then
	 DOUT <= DIN;
     end if;
   end process;
end FASTSLEW;



End of Record #1377

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